MOS technology 6502cpu was a popular component at that time. In various improved versions, it powered all devices from the Commodore 64 to the Nintendo Entertainment System and appeared in a million other applications. A popular variant is 65C02, [J ü rgen] decided to develop a pin compatible FPGA version with an operating frequency of 100MHz.
The CPU core is borrowed by [arlet ottens] and extended to 65C02 function by [ed spittles] and [David banks]. [J ü rgen] then package the core in spartan-6 FPGA and place it on a small PCB, which is equivalent to the original 40 pin dual in-line package of 65C02.
The FPGA is set to access the external CPU bus at a time matching the host clock. Internally, however, the CPU core operates at a frequency of 100MHz. It copies ram and ROM from the host to its own internal 64 kb ram, subtracting the area used by the host for memory mapped I / O. The CPU then runs at 100 MHz full speed unless it needs to communicate with these I / O addresses.
It allows the chip to accelerate a large number of tasks without completely losing control when used with old hardware that cannot run near 100MHz. The pin compatible design has been successfully tested on Apple II, Commodore 8032 and various old chess computers.
We have seen the opposite before. A real 6502 is paired with an FPGA as the rest of the computer. If you have your own 6502 cutting-edge hackers (not printing errors!), please let us know!
[thanks for David Palmer’s tips]
